Before I started my research on reconfigurable and parallel systems, I worked on power electronics and control systems during my master studies at the University of Paderborn, Germany. Before my PhD time, I implemented neural networks for classification and function approximation on coarse-grained CPU arrays. During my PhD time at the University of Erlangen-Nuremberg, Germany, I developed novel techniques for self-adaptive distributed embedded control systems based on FPGAs. After this, I led a research project at the University of Oslo, Norway which is targeting to make partial reconfiguration of FPGAs more accessible. In 2013, I joined the Advanced Processors Technologies Group at the University of Manchester as a lecturer. I was a program co-chair and organizer of the FPL conference and I am a program committee member of several conferences and workshops including
Proin non purus ipsum. Integer vitae interdum lorem. Etiam id neque faucibus nunc venenatis iaculis condimentum ac augue. Nulla luctus maximus purus volutpat ultrices. Nulla euismod mauris id ornare aliquam. Maecenas tincidunt magna ante
Proin non purus ipsum. Integer vitae interdum lorem. Etiam id neque faucibus nunc venenatis iaculis condimentum ac augue. Nulla luctus maximus purus volutpat ultrices. Nulla euismod mauris id ornare aliquam. Maecenas tincidunt magna ante
Proin non purus ipsum. Integer vitae interdum lorem. Etiam id neque faucibus nunc venenatis iaculis condimentum ac augue. Nulla luctus maximus purus volutpat ultrices. Nulla euismod mauris id ornare aliquam. Maecenas tincidunt magna ante
Proin non purus ipsum. Integer vitae interdum lorem. Etiam id neque faucibus nunc venenatis iaculis condimentum ac augue. Nulla luctus maximus purus volutpat ultrices. Nulla euismod mauris id ornare aliquam. Maecenas tincidunt magna ante
Proin non purus ipsum. Integer vitae interdum lorem. Etiam id neque faucibus nunc venenatis iaculis condimentum ac augue. Nulla luctus maximus purus volutpat ultrices. Nulla euismod mauris id ornare aliquam. Maecenas tincidunt magna ante
Jose Ordez Raul Garcia - Graduate Student
2014 - 2018
Currently: Research Engineer @ Intel Labs Germany
Malte Vesper - Graduate Student
2014 - 2019
Currently: Software dev @ place holder
Edson Horta - PostDoc
2016 - 2018
Currently: PostDoc @ place holder